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Delay Analysis
 

Overview

This package is a delay analysis package which calculates the cell and net delays. In the "basic" mode it calculates 
delay based on specification the library data, taking into full account parameters such as min/max operating conditions, 
scaling factors, wireload models, etc. The correctness of delay calculation numbers in the "basic" mode have been 
verified against the industry standard tool at multiple customer sites. Beyond the basic mode, it allows one to 
customized delay calculation based on physical data (either from DEF or from SPEF), customized and more accurate 
modeling of physical data (taking into account cross-coupling, IR drops, etc.), customized and more accurate cell/net 
delay characterization models, customized delay calculation equations/algorithms, etc. One can utilize this delay 
analysis package as a stand-alone delay calculation engine which produces delay annotations for current timing 
analysis engine, or can use our own integrated timing analysis package. We can also customize existing standard 
file formats to support some of this customization. 


For more details on features, please check out the individual components used in this package:

Delay Engine
Verilog Parser/Elaborator (Netlist)  or Physical Data  (DEF) Elaborator

Library Elaborator
ALF Parser or Library Parser
SDF Parser/Elaborator (BackAnnotation)
SPEF Parser/Elaborator

Command Parser/Interpreter
Message/Error/Help Mechanism
Variable Mechanism
Design Database

Inputs

Library format, ALF, SPEF, DEF, LEF, Verilog

Outputs

SDF, Command scripts (e.g., "set_delay") 

Uses/Flows

Customized delay calculation in an existing flow.